Methodology Details

System Specification
Procedure
Output
Define An Incremental Delivery Plan
Capability Map By Delivery
Describe User Interaction With System
Graphical User Interface Prototype
Specify Major Software Components
Software Architecture Diagram
Develop User/Component Interactions
System Operations Specification
Associate Performance With Interactions
System Performance Allocation

Return


Operations Specification
Procedure
Output
Explicitly Identify External Interfaces
External Interface Diagram
Identify User Scenarios And Phases
Scenario And Phase List
Expand System Ops To Include External Interfaces
Dynamic Message Flows
Partition Message Flows Into Inputs/Corresponding Outputs
Test Input/Output Pattern

Return



Requirements Specification
Procedure
Output
Collapse Dynamic Message Flow Into Static Representation
Context Diagram
Decompose Context Diagram Into First Level Processing
Data Flow Diagram
Further Refine First Level Processing
Data Flow Diagram
Generate Internal Structures Of Data Stores
Data Dictionary
Define Decision Making Logic
State Transition Diagram
Translate Decisions Into Sequences Of Processing
Process Activation Table

Return


Requirements Validation
Procedure
Output
Integrate Requirements Using Test Input/Output Pattern
Requirements Validation Table
Associate Performance With Integrated Requirements
Requirements Performance Allocation

Return


Design Specification
Procedure
Output
Define Multithreaded Architecture
Thread Architecture Diagram
Evaluate Architecture Using Heuristics
Qualitative Architecture Evaluation
Detailed Design: Hardware Interface Controllers
Structure Charts
Detailed Design: Table Driven Controllers
Structure Charts
Detailed Design: Computational Processing Managers
Structure Charts
Detailed Design: Data Managers
Class Specifications
Detailed Design: Hardware Interface Managers
Class Specifications

Return


Design Validation
Procedure
Output
Validate Design Using Test Input/Output Pattern
Architecture Validation Table
Associate Performance With Multithreaded Architecture
Design Performance Allocation

Return


Return